Individual Result Flash Admission Treshold: 0
0.005
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 69,392,150 | 45,319,346 | 69,392,150 | 0.404716 | 0.619694 | 0.65309 | 41,308,021 | 17,235,217 | 24,072,804 | 31,573,385 |
| CLOCK | 0 | 69,392,150 | 45,319,346 | 69,392,150 | 0.405096 | 0.620275 | 0.65309 | 41,281,680 | 17,208,876 | 24,072,804 | 34,457,744 |
| LRU | 0 | 69,392,150 | 45,319,346 | 69,392,150 | 0.405096 | 0.620275 | 0.65309 | 41,281,680 | 17,208,876 | 24,072,804 | 34,457,744 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 67,427,405 | 65,330,896 | 67,427,405 | 0.799222 | 0.82487 | 0.968907 | 13,537,931 | 11,441,422 | 2,096,509 | 55,441,404 |
| CLOCK | 0 | 67,427,405 | 65,330,896 | 67,427,405 | 0.801759 | 0.827488 | 0.968907 | 13,366,876 | 11,270,367 | 2,096,509 | 63,260,039 |
| LRU | 0 | 67,427,405 | 65,330,896 | 67,427,405 | 0.801759 | 0.827488 | 0.968907 | 13,366,876 | 11,270,367 | 2,096,509 | 63,260,039 |
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 44,464,937 | 44,221,481 | 44,464,937 | 0.96046 | 0.965748 | 0.994525 | 1,758,130 | 1,514,674 | 243,456 | 42,711,734 |
| FIFO | 0 | 44,464,937 | 44,221,481 | 44,464,937 | 0.96046 | 0.965748 | 0.994525 | 1,758,130 | 1,514,674 | 243,456 | 42,711,734 |
| Offline CLOCK | 0 | 44,464,937 | 44,221,481 | 44,464,937 | 0.955944 | 0.961207 | 0.994525 | 1,958,937 | 1,715,481 | 243,456 | 42,760,817 |
| CLOCK | 0 | 44,464,937 | 44,221,481 | 44,464,937 | 0.956214 | 0.961479 | 0.994525 | 1,946,931 | 1,703,475 | 243,456 | 43,747,528 |
| LRU | 0 | 44,464,937 | 44,221,481 | 44,464,937 | 0.956214 | 0.961479 | 0.994525 | 1,946,931 | 1,703,475 | 243,456 | 43,747,528 |
w10
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0916851 | 0.441532 | 0.207652 | 41,197,101 | 5,259,756 | 35,937,345 | 4,172,202 |
| LRU | 0 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0916851 | 0.441532 | 0.207652 | 41,197,101 | 5,259,756 | 35,937,345 | 4,172,202 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 34,816,425 | 23,912,372 | 34,816,425 | 0.580471 | 0.845167 | 0.686813 | 14,606,486 | 3,702,433 | 10,904,053 | 21,003,182 |
| CLOCK | 0 | 34,816,425 | 23,912,372 | 34,816,425 | 0.58089 | 0.845776 | 0.686813 | 14,591,915 | 3,687,862 | 10,904,053 | 22,333,475 |
| LRU | 0 | 34,816,425 | 23,912,372 | 34,816,425 | 0.58089 | 0.845776 | 0.686813 | 14,591,915 | 3,687,862 | 10,904,053 | 22,333,475 |
| LRU | 0 | 34,816,425 | 23,912,372 | 34,816,425 | 0.58443 | 0.85093 | 0.686813 | 14,468,676 | 3,564,623 | 10,904,053 | 23,911,926 |
w15
w02
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 46,173,369 | 46,126,372 | 46,173,369 | 0.958228 | 0.959204 | 0.998982 | 1,928,768 | 1,881,771 | 46,997 | 44,263,816 |
| LRU | 0 | 46,173,369 | 46,126,372 | 46,173,369 | 0.958228 | 0.959204 | 0.998982 | 1,928,768 | 1,881,771 | 46,997 | 44,263,816 |
| LRU | 0 | 46,173,369 | 46,126,372 | 46,173,369 | 0.953999 | 0.954971 | 0.998982 | 2,124,018 | 2,077,021 | 46,997 | 46,126,240 |
w13
w03
w09
0.01
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 67,427,405 | 63,173,128 | 67,427,405 | 0.744884 | 0.795047 | 0.936906 | 17,201,777 | 12,947,500 | 4,254,277 | 52,793,244 |
| CLOCK | 0 | 67,427,405 | 63,173,128 | 67,427,405 | 0.749384 | 0.79985 | 0.936906 | 16,898,373 | 12,644,096 | 4,254,277 | 59,633,621 |
| LRU | 0 | 67,427,405 | 63,173,128 | 67,427,405 | 0.749384 | 0.79985 | 0.936906 | 16,898,373 | 12,644,096 | 4,254,277 | 59,633,621 |
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 44,464,937 | 44,185,479 | 44,464,937 | 0.94725 | 0.953241 | 0.993715 | 2,345,522 | 2,066,064 | 279,458 | 42,126,982 |
| LRU | 0 | 44,464,937 | 44,185,479 | 44,464,937 | 0.94725 | 0.953241 | 0.993715 | 2,345,522 | 2,066,064 | 279,458 | 42,126,982 |
| LRU | 0 | 44,464,937 | 44,185,479 | 44,464,937 | 0.944539 | 0.950513 | 0.993715 | 2,466,070 | 2,186,612 | 279,458 | 44,184,575 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 48,342,350 | 45,845,570 | 48,342,350 | 0.693047 | 0.73079 | 0.948352 | 14,838,848 | 12,342,068 | 2,496,780 | 34,705,523 |
| CLOCK | 0 | 48,342,350 | 45,845,570 | 48,342,350 | 0.695612 | 0.733495 | 0.948352 | 14,714,839 | 12,218,059 | 2,496,780 | 39,984,788 |
| LRU | 0 | 48,342,350 | 45,845,570 | 48,342,350 | 0.695612 | 0.733495 | 0.948352 | 14,714,839 | 12,218,059 | 2,496,780 | 39,984,788 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0838253 | 0.454984 | 0.184238 | 41,553,588 | 4,554,258 | 36,999,330 | 3,813,061 |
| LRU | 0 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0838253 | 0.454984 | 0.184238 | 41,553,588 | 4,554,258 | 36,999,330 | 3,813,061 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 34,816,425 | 23,611,076 | 34,816,425 | 0.578078 | 0.852422 | 0.678159 | 14,689,832 | 3,484,483 | 11,205,349 | 20,147,344 |
| LRU | 0 | 34,816,425 | 23,611,076 | 34,816,425 | 0.578078 | 0.852422 | 0.678159 | 14,689,832 | 3,484,483 | 11,205,349 | 20,147,344 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 33,628,757 | 33,549,241 | 33,628,757 | 0.990223 | 0.99257 | 0.997635 | 328,772 | 249,256 | 79,516 | 33,308,699 |
| CLOCK | 0 | 33,628,757 | 33,549,241 | 33,628,757 | 0.990245 | 0.992592 | 0.997635 | 328,049 | 248,533 | 79,516 | 33,506,288 |
| LRU | 0 | 33,628,757 | 33,549,241 | 33,628,757 | 0.990245 | 0.992592 | 0.997635 | 328,049 | 248,533 | 79,516 | 33,506,288 |
w02
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 46,173,369 | 46,046,040 | 46,173,369 | 0.916685 | 0.91922 | 0.997242 | 3,846,942 | 3,719,613 | 127,329 | 42,361,245 |
| LRU | 0 | 46,173,369 | 46,046,040 | 46,173,369 | 0.916685 | 0.91922 | 0.997242 | 3,846,942 | 3,719,613 | 127,329 | 42,361,245 |
w13
w03
w09
0.1
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 67,427,405 | 57,353,172 | 67,427,405 | 0.459924 | 0.54071 | 0.850591 | 36,415,946 | 26,341,713 | 10,074,233 | 36,645,434 |
| CLOCK | 0 | 67,427,405 | 57,353,172 | 67,427,405 | 0.472961 | 0.556038 | 0.850591 | 35,536,861 | 25,462,628 | 10,074,233 | 43,890,042 |
| LRU | 0 | 67,427,405 | 57,353,172 | 67,427,405 | 0.472961 | 0.556038 | 0.850591 | 35,536,861 | 25,462,628 | 10,074,233 | 43,890,042 |
w08
w10
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0321873 | 0.278038 | 0.115766 | 43,895,655 | 3,790,758 | 40,104,897 | 1,467,472 |
| FIFO | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0321873 | 0.278038 | 0.115766 | 43,895,655 | 3,790,758 | 40,104,897 | 1,467,472 |
| Offline CLOCK | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0229934 | 0.19862 | 0.115766 | 44,312,651 | 4,207,754 | 40,104,897 | 1,712,617 |
| CLOCK | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0238223 | 0.205779 | 0.115766 | 44,275,058 | 4,170,161 | 40,104,897 | 2,286,219 |
| LRU | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0238223 | 0.205779 | 0.115766 | 44,275,058 | 4,170,161 | 40,104,897 | 2,286,219 |
| LRU | 0 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0250881 | 0.216714 | 0.115766 | 44,217,643 | 4,112,746 | 40,104,897 | 5,250,215 |
w14
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 33,628,757 | 33,485,932 | 33,628,757 | 0.938867 | 0.942871 | 0.995753 | 2,055,832 | 1,913,007 | 142,825 | 31,574,178 |
| LRU | 0 | 33,628,757 | 33,485,932 | 33,628,757 | 0.938867 | 0.942871 | 0.995753 | 2,055,832 | 1,913,007 | 142,825 | 31,574,178 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 122,181,000 | 121,197,647 | 122,181,000 | 0.966583 | 0.974425 | 0.991952 | 4,082,964 | 3,099,611 | 983,353 | 118,161,680 |
| LRU | 0 | 122,181,000 | 121,197,647 | 122,181,000 | 0.966583 | 0.974425 | 0.991952 | 4,082,964 | 3,099,611 | 983,353 | 118,161,680 |
| LRU | 0 | 122,181,000 | 121,197,647 | 122,181,000 | 0.97355 | 0.981449 | 0.991952 | 3,231,653 | 2,248,300 | 983,353 | 121,197,152 |
w11
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 39,822,877 | 36,125,939 | 39,822,877 | 0.301222 | 0.332047 | 0.907165 | 27,827,370 | 24,130,432 | 3,696,938 | 12,007,965 |
| LRU | 0 | 39,822,877 | 36,125,939 | 39,822,877 | 0.301222 | 0.332047 | 0.907165 | 27,827,370 | 24,130,432 | 3,696,938 | 12,007,965 |
w03
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 84,712,978 | 60,006,930 | 84,712,978 | 0.550349 | 0.776939 | 0.708356 | 38,091,236 | 13,385,188 | 24,706,048 | 59,979,078 |
w09
0.25
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 69,392,150 | 32,548,821 | 69,392,150 | 0.0322941 | 0.0688491 | 0.469056 | 67,151,194 | 30,307,865 | 36,843,329 | 2,247,712 |
| LRU | 0 | 69,392,150 | 32,548,821 | 69,392,150 | 0.0322941 | 0.0688491 | 0.469056 | 67,151,194 | 30,307,865 | 36,843,329 | 2,247,712 |
| LRU | 0 | 69,392,150 | 32,548,821 | 69,392,150 | 0.0280395 | 0.0597786 | 0.469056 | 67,446,426 | 30,603,097 | 36,843,329 | 32,544,573 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 67,427,405 | 56,285,198 | 67,427,405 | 0.289353 | 0.346633 | 0.834753 | 47,917,088 | 36,774,881 | 11,142,207 | 25,759,081 |
| CLOCK | 0 | 67,427,405 | 56,285,198 | 67,427,405 | 0.297568 | 0.356475 | 0.834753 | 47,363,139 | 36,220,932 | 11,142,207 | 31,059,112 |
| LRU | 0 | 67,427,405 | 56,285,198 | 67,427,405 | 0.297568 | 0.356475 | 0.834753 | 47,363,139 | 36,220,932 | 11,142,207 | 31,059,112 |
w08
w10
w12
w14
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 33,628,757 | 33,457,330 | 33,628,757 | 0.863452 | 0.867876 | 0.994902 | 4,591,948 | 4,420,521 | 171,427 | 33,443,434 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0227611 | 0.0229669 | 0.99104 | 119,400,026 | 118,305,299 | 1,094,727 | 121,085,035 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 46,173,369 | 45,060,720 | 46,173,369 | 0.359899 | 0.368786 | 0.975903 | 29,555,618 | 28,442,969 | 1,112,649 | 16,672,176 |
| LRU | 0 | 46,173,369 | 45,060,720 | 46,173,369 | 0.359899 | 0.368786 | 0.975903 | 29,555,618 | 28,442,969 | 1,112,649 | 16,672,176 |
w13
w03
w09
0.5
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 69,392,150 | 28,709,131 | 69,392,150 | 0.0262671 | 0.0634897 | 0.413723 | 67,569,417 | 26,886,398 | 40,683,019 | 28,700,634 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 67,427,405 | 54,823,537 | 67,427,405 | 0.227779 | 0.280145 | 0.813075 | 52,068,891 | 39,465,023 | 12,603,868 | 15,388,023 |
| LRU | 0 | 67,427,405 | 54,823,537 | 67,427,405 | 0.227779 | 0.280145 | 0.813075 | 52,068,891 | 39,465,023 | 12,603,868 | 15,388,023 |
w08
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 48,342,350 | 35,038,495 | 48,342,350 | 0.289765 | 0.399787 | 0.724799 | 34,334,412 | 21,030,557 | 13,303,855 | 18,826,304 |
| CLOCK | 0 | 48,342,350 | 35,038,495 | 48,342,350 | 0.294598 | 0.406455 | 0.724799 | 34,100,769 | 20,796,914 | 13,303,855 | 22,611,780 |
| LRU | 0 | 48,342,350 | 35,038,495 | 48,342,350 | 0.294598 | 0.406455 | 0.724799 | 34,100,769 | 20,796,914 | 13,303,855 | 22,611,780 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 45,355,529 | 3,838,229 | 45,355,529 | 0.0117716 | 0.139103 | 0.0846254 | 44,821,621 | 3,304,321 | 41,517,300 | 536,850 |
| FIFO | 0 | 45,355,529 | 3,838,229 | 45,355,529 | 0.0117716 | 0.139103 | 0.0846254 | 44,821,621 | 3,304,321 | 41,517,300 | 536,850 |
| Offline CLOCK | 0 | 45,355,529 | 3,838,229 | 45,355,529 | 0.00981697 | 0.116005 | 0.0846254 | 44,910,275 | 3,392,975 | 41,517,300 | 611,856 |
| CLOCK | 0 | 45,355,529 | 3,838,229 | 45,355,529 | 0.00998575 | 0.117999 | 0.0846254 | 44,902,620 | 3,385,320 | 41,517,300 | 753,021 |
| LRU | 0 | 45,355,529 | 3,838,229 | 45,355,529 | 0.00998575 | 0.117999 | 0.0846254 | 44,902,620 | 3,385,320 | 41,517,300 | 753,021 |
w14
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 0 | 33,628,757 | 33,437,060 | 33,628,757 | 0.692608 | 0.696578 | 0.9943 | 10,337,222 | 10,145,525 | 191,697 | 26,617,677 |
| CLOCK | 0 | 33,628,757 | 33,437,060 | 33,628,757 | 0.718243 | 0.722361 | 0.9943 | 9,475,128 | 9,283,431 | 191,697 | 31,712,901 |
| LRU | 0 | 33,628,757 | 33,437,060 | 33,628,757 | 0.718243 | 0.722361 | 0.9943 | 9,475,128 | 9,283,431 | 191,697 | 31,712,901 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 122,181,000 | 120,991,817 | 122,181,000 | 0.00708609 | 0.00715573 | 0.990267 | 121,315,215 | 120,126,032 | 1,189,183 | 120,989,340 |
w11
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 0 | 39,822,877 | 24,252,535 | 39,822,877 | 0.172683 | 0.283546 | 0.60901 | 32,946,158 | 17,375,816 | 15,570,342 | 6,882,886 |
| LRU | 0 | 39,822,877 | 24,252,535 | 39,822,877 | 0.172683 | 0.283546 | 0.60901 | 32,946,158 | 17,375,816 | 15,570,342 | 6,882,886 |
| LRU | 0 | 39,822,877 | 24,252,535 | 39,822,877 | 0.171544 | 0.281677 | 0.60901 | 32,991,485 | 17,421,143 | 15,570,342 | 24,224,727 |
w03
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 0 | 49,622,929 | 27,753,460 | 49,622,929 | 0.318324 | 0.56916 | 0.559287 | 33,826,763 | 11,957,294 | 21,869,469 | 27,679,123 |
Individual Result Flash Admission Treshold: 1
0.005
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 69,392,150 | 45,319,346 | 69,392,150 | 0.404716 | 0.619694 | 0.65309 | 41,308,021 | 17,235,217 | 24,072,804 | 31,573,385 |
| CLOCK | 1 | 69,392,150 | 45,319,346 | 69,392,150 | 0.405096 | 0.620275 | 0.65309 | 41,281,680 | 17,208,876 | 24,072,804 | 34,457,744 |
| LRU | 1 | 69,392,150 | 45,319,346 | 69,392,150 | 0.405096 | 0.620275 | 0.65309 | 41,281,680 | 17,208,876 | 24,072,804 | 34,457,744 |
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 44,464,937 | 44,221,481 | 44,464,937 | 0.96046 | 0.965748 | 0.994525 | 1,758,130 | 1,514,674 | 243,456 | 42,711,734 |
| FIFO | 1 | 44,464,937 | 44,221,481 | 44,464,937 | 0.96046 | 0.965748 | 0.994525 | 1,758,130 | 1,514,674 | 243,456 | 42,711,734 |
| Offline CLOCK | 1 | 44,464,937 | 44,221,481 | 44,464,937 | 0.955944 | 0.961207 | 0.994525 | 1,958,937 | 1,715,481 | 243,456 | 42,760,817 |
| CLOCK | 1 | 44,464,937 | 44,221,481 | 44,464,937 | 0.956214 | 0.961479 | 0.994525 | 1,946,931 | 1,703,475 | 243,456 | 43,747,528 |
| LRU | 1 | 44,464,937 | 44,221,481 | 44,464,937 | 0.956214 | 0.961479 | 0.994525 | 1,946,931 | 1,703,475 | 243,456 | 43,747,528 |
w09
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 39,822,877 | 37,870,172 | 39,822,877 | 0.607766 | 0.639104 | 0.950965 | 15,619,904 | 13,667,199 | 1,952,705 | 37,869,894 |
w14
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 122,181,000 | 121,636,201 | 122,181,000 | 0.990503 | 0.99494 | 0.995541 | 1,160,298 | 615,499 | 544,799 | 121,022,397 |
| LRU | 1 | 122,181,000 | 121,636,201 | 122,181,000 | 0.990503 | 0.99494 | 0.995541 | 1,160,298 | 615,499 | 544,799 | 121,022,397 |
| LRU | 1 | 122,181,000 | 121,636,201 | 122,181,000 | 0.990258 | 0.994694 | 0.995541 | 1,190,251 | 645,452 | 544,799 | 121,636,177 |
w07
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 46,173,369 | 46,126,372 | 46,173,369 | 0.958228 | 0.959204 | 0.998982 | 1,928,768 | 1,881,771 | 46,997 | 44,263,816 |
| LRU | 1 | 46,173,369 | 46,126,372 | 46,173,369 | 0.958228 | 0.959204 | 0.998982 | 1,928,768 | 1,881,771 | 46,997 | 44,263,816 |
w15
0.01
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 69,392,150 | 43,754,555 | 69,392,150 | 0.372193 | 0.590276 | 0.63054 | 43,564,888 | 17,927,293 | 25,637,595 | 43,754,386 |
w08
w09
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0838253 | 0.454984 | 0.184238 | 41,553,588 | 4,554,258 | 36,999,330 | 3,813,061 |
| LRU | 1 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0838253 | 0.454984 | 0.184238 | 41,553,588 | 4,554,258 | 36,999,330 | 3,813,061 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 39,822,877 | 37,675,216 | 39,822,877 | 0.46217 | 0.488516 | 0.94607 | 21,417,929 | 19,270,268 | 2,147,661 | 18,454,792 |
| LRU | 1 | 39,822,877 | 37,675,216 | 39,822,877 | 0.46217 | 0.488516 | 0.94607 | 21,417,929 | 19,270,268 | 2,147,661 | 18,454,792 |
w14
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989328 | 0.994719 | 0.99458 | 1,303,886 | 641,718 | 662,168 | 121,518,783 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 67,427,405 | 63,173,128 | 67,427,405 | 0.771168 | 0.8231 | 0.936906 | 15,429,580 | 11,175,303 | 4,254,277 | 52,054,568 |
| LRU | 1 | 67,427,405 | 63,173,128 | 67,427,405 | 0.771168 | 0.8231 | 0.936906 | 15,429,580 | 11,175,303 | 4,254,277 | 52,054,568 |
w11
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 33,628,757 | 33,549,241 | 33,628,757 | 0.990306 | 0.992653 | 0.997635 | 325,992 | 246,476 | 79,516 | 33,548,686 |
0.1
w06
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 44,464,937 | 43,653,785 | 44,464,937 | 0.863606 | 0.879654 | 0.981757 | 6,064,732 | 5,253,580 | 811,152 | 39,625,466 |
| CLOCK | 1 | 44,464,937 | 43,653,785 | 44,464,937 | 0.86587 | 0.881959 | 0.981757 | 5,964,071 | 5,152,919 | 811,152 | 41,960,741 |
| LRU | 1 | 44,464,937 | 43,653,785 | 44,464,937 | 0.86587 | 0.881959 | 0.981757 | 5,964,071 | 5,152,919 | 811,152 | 41,960,741 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 49,622,929 | 30,146,578 | 49,622,929 | 0.511079 | 0.841264 | 0.607513 | 24,261,711 | 4,785,360 | 19,476,351 | 25,381,113 |
| LRU | 1 | 49,622,929 | 30,146,578 | 49,622,929 | 0.511079 | 0.841264 | 0.607513 | 24,261,711 | 4,785,360 | 19,476,351 | 25,381,113 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0229934 | 0.19862 | 0.115766 | 44,312,651 | 4,207,754 | 40,104,897 | 1,712,617 |
| CLOCK | 1 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0238223 | 0.205779 | 0.115766 | 44,275,058 | 4,170,161 | 40,104,897 | 2,286,219 |
| LRU | 1 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0238223 | 0.205779 | 0.115766 | 44,275,058 | 4,170,161 | 40,104,897 | 2,286,219 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 39,822,877 | 36,125,939 | 39,822,877 | 0.301222 | 0.332047 | 0.907165 | 27,827,370 | 24,130,432 | 3,696,938 | 12,007,965 |
| LRU | 1 | 39,822,877 | 36,125,939 | 39,822,877 | 0.301222 | 0.332047 | 0.907165 | 27,827,370 | 24,130,432 | 3,696,938 | 12,007,965 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 34,816,425 | 22,828,337 | 34,816,425 | 0.491004 | 0.74885 | 0.655677 | 17,721,415 | 5,733,327 | 11,988,088 | 17,935,114 |
| CLOCK | 1 | 34,816,425 | 22,828,337 | 34,816,425 | 0.491497 | 0.749602 | 0.655677 | 17,704,249 | 5,716,161 | 11,988,088 | 19,089,368 |
| LRU | 1 | 34,816,425 | 22,828,337 | 34,816,425 | 0.491497 | 0.749602 | 0.655677 | 17,704,249 | 5,716,161 | 11,988,088 | 19,089,368 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 122,181,000 | 121,197,647 | 122,181,000 | 0.966583 | 0.974425 | 0.991952 | 4,082,964 | 3,099,611 | 983,353 | 118,161,680 |
| LRU | 1 | 122,181,000 | 121,197,647 | 122,181,000 | 0.966583 | 0.974425 | 0.991952 | 4,082,964 | 3,099,611 | 983,353 | 118,161,680 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 67,427,405 | 57,353,172 | 67,427,405 | 0.502009 | 0.590189 | 0.850591 | 33,578,209 | 23,503,976 | 10,074,233 | 33,955,647 |
| LRU | 1 | 67,427,405 | 57,353,172 | 67,427,405 | 0.502009 | 0.590189 | 0.850591 | 33,578,209 | 23,503,976 | 10,074,233 | 33,955,647 |
w11
w15
0.25
w06
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 44,464,937 | 43,086,145 | 44,464,937 | 0.794916 | 0.820354 | 0.968991 | 9,119,051 | 7,740,259 | 1,378,792 | 37,201,113 |
| CLOCK | 1 | 44,464,937 | 43,086,145 | 44,464,937 | 0.797004 | 0.822509 | 0.968991 | 9,026,212 | 7,647,420 | 1,378,792 | 39,898,008 |
| LRU | 1 | 44,464,937 | 43,086,145 | 44,464,937 | 0.797004 | 0.822509 | 0.968991 | 9,026,212 | 7,647,420 | 1,378,792 | 39,898,008 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 49,622,929 | 28,610,632 | 49,622,929 | 0.371955 | 0.645127 | 0.576561 | 31,165,437 | 10,153,140 | 21,012,297 | 22,232,090 |
| CLOCK | 1 | 49,622,929 | 28,610,632 | 49,622,929 | 0.377616 | 0.654946 | 0.576561 | 30,884,508 | 9,872,211 | 21,012,297 | 24,820,629 |
| LRU | 1 | 49,622,929 | 28,610,632 | 49,622,929 | 0.377616 | 0.654946 | 0.576561 | 30,884,508 | 9,872,211 | 21,012,297 | 24,820,629 |
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 39,822,877 | 32,545,479 | 39,822,877 | 0.181468 | 0.222046 | 0.817256 | 32,596,296 | 25,318,898 | 7,277,398 | 8,890,304 |
| CLOCK | 1 | 39,822,877 | 32,545,479 | 39,822,877 | 0.183472 | 0.224498 | 0.817256 | 32,516,481 | 25,239,083 | 7,277,398 | 11,630,646 |
| LRU | 1 | 39,822,877 | 32,545,479 | 39,822,877 | 0.183472 | 0.224498 | 0.817256 | 32,516,481 | 25,239,083 | 7,277,398 | 11,630,646 |
| LRU | 1 | 39,822,877 | 32,545,479 | 39,822,877 | 0.183648 | 0.224712 | 0.817256 | 32,509,503 | 25,232,105 | 7,277,398 | 32,531,575 |
w14
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0227611 | 0.0229669 | 0.99104 | 119,400,026 | 118,305,299 | 1,094,727 | 121,085,035 |
w07
w11
w15
0.5
w06
w08
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 49,622,929 | 27,753,460 | 49,622,929 | 0.34587 | 0.618413 | 0.559287 | 32,459,839 | 10,590,370 | 21,869,469 | 17,149,969 |
| LRU | 1 | 49,622,929 | 27,753,460 | 49,622,929 | 0.34587 | 0.618413 | 0.559287 | 32,459,839 | 10,590,370 | 21,869,469 | 17,149,969 |
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 1 | 39,822,877 | 24,252,535 | 39,822,877 | 0.169748 | 0.278728 | 0.60901 | 33,063,014 | 17,492,672 | 15,570,342 | 6,954,058 |
| CLOCK | 1 | 39,822,877 | 24,252,535 | 39,822,877 | 0.170039 | 0.279205 | 0.60901 | 33,051,451 | 17,481,109 | 15,570,342 | 8,894,729 |
| LRU | 1 | 39,822,877 | 24,252,535 | 39,822,877 | 0.170039 | 0.279205 | 0.60901 | 33,051,451 | 17,481,109 | 15,570,342 | 8,894,729 |
| LRU | 1 | 39,822,877 | 24,252,535 | 39,822,877 | 0.171544 | 0.281677 | 0.60901 | 32,991,485 | 17,421,143 | 15,570,342 | 24,224,727 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 34,816,425 | 20,357,714 | 34,816,425 | 0.266518 | 0.455808 | 0.584716 | 25,537,209 | 11,078,498 | 14,458,711 | 20,313,052 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 1 | 122,181,000 | 120,991,817 | 122,181,000 | 0.0115251 | 0.0116383 | 0.990267 | 120,772,856 | 119,583,673 | 1,189,183 | 1,524,691 |
| LRU | 1 | 122,181,000 | 120,991,817 | 122,181,000 | 0.0115251 | 0.0116383 | 0.990267 | 120,772,856 | 119,583,673 | 1,189,183 | 1,524,691 |
| LRU | 1 | 122,181,000 | 120,991,817 | 122,181,000 | 0.00708609 | 0.00715573 | 0.990267 | 121,315,215 | 120,126,032 | 1,189,183 | 120,989,340 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 67,427,405 | 54,823,537 | 67,427,405 | 0.224069 | 0.275582 | 0.813075 | 52,319,017 | 39,715,149 | 12,603,868 | 54,776,024 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 1 | 46,173,369 | 44,066,678 | 46,173,369 | 0.147397 | 0.154443 | 0.954374 | 39,367,571 | 37,260,880 | 2,106,691 | 44,053,456 |
w15
Individual Result Flash Admission Treshold: 2
0.005
w02
w04
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 77,764,582 | 55,343,304 | 77,764,582 | 0.508339 | 0.714283 | 0.711678 | 38,233,802 | 15,812,524 | 22,421,278 | 46,172,793 |
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 69,392,150 | 45,319,346 | 69,392,150 | 0.441901 | 0.676631 | 0.65309 | 38,727,659 | 14,654,855 | 24,072,804 | 29,279,211 |
| LRU | 2 | 69,392,150 | 45,319,346 | 69,392,150 | 0.441901 | 0.676631 | 0.65309 | 38,727,659 | 14,654,855 | 24,072,804 | 29,279,211 |
w09
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 48,342,350 | 46,272,453 | 48,342,350 | 0.743 | 0.776237 | 0.957183 | 12,423,966 | 10,354,069 | 2,069,897 | 24,707,298 |
| CLOCK | 2 | 48,342,350 | 46,272,453 | 48,342,350 | 0.74568 | 0.779037 | 0.957183 | 12,294,411 | 10,224,514 | 2,069,897 | 28,936,647 |
| LRU | 2 | 48,342,350 | 46,272,453 | 48,342,350 | 0.74568 | 0.779037 | 0.957183 | 12,294,411 | 10,224,514 | 2,069,897 | 28,936,647 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 46,173,369 | 46,126,372 | 46,173,369 | 0.949466 | 0.950434 | 0.998982 | 2,333,306 | 2,286,309 | 46,997 | 41,678,131 |
| CLOCK | 2 | 46,173,369 | 46,126,372 | 46,173,369 | 0.95056 | 0.951529 | 0.998982 | 2,282,808 | 2,235,811 | 46,997 | 42,858,612 |
| LRU | 2 | 46,173,369 | 46,126,372 | 46,173,369 | 0.95056 | 0.951529 | 0.998982 | 2,282,808 | 2,235,811 | 46,997 | 42,858,612 |
| LRU | 2 | 46,173,369 | 46,126,372 | 46,173,369 | 0.952471 | 0.953442 | 0.998982 | 2,194,566 | 2,147,569 | 46,997 | 43,482,779 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0841276 | 0.405136 | 0.207652 | 41,539,879 | 5,602,534 | 35,937,345 | 4,027,178 |
| CLOCK | 2 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0846274 | 0.407544 | 0.207652 | 41,517,207 | 5,579,862 | 35,937,345 | 4,853,325 |
| LRU | 2 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0846274 | 0.407544 | 0.207652 | 41,517,207 | 5,579,862 | 35,937,345 | 4,853,325 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 39,822,877 | 37,870,172 | 39,822,877 | 0.60657 | 0.637846 | 0.950965 | 15,667,521 | 13,714,816 | 1,952,705 | 18,649,450 |
| LRU | 2 | 39,822,877 | 37,870,172 | 39,822,877 | 0.60657 | 0.637846 | 0.950965 | 15,667,521 | 13,714,816 | 1,952,705 | 18,649,450 |
w15
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 44,464,937 | 44,221,481 | 44,464,937 | 0.960963 | 0.966253 | 0.994525 | 1,735,794 | 1,492,338 | 243,456 | 33,709,040 |
| LRU | 2 | 44,464,937 | 44,221,481 | 44,464,937 | 0.960963 | 0.966253 | 0.994525 | 1,735,794 | 1,492,338 | 243,456 | 33,709,040 |
w07
w14
0.01
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989232 | 0.994622 | 0.99458 | 1,315,704 | 653,536 | 662,168 | 120,521,687 |
| CLOCK | 2 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989244 | 0.994635 | 0.99458 | 1,314,158 | 651,990 | 662,168 | 120,877,470 |
| LRU | 2 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989244 | 0.994635 | 0.99458 | 1,314,158 | 651,990 | 662,168 | 120,877,470 |
w04
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 77,764,582 | 53,722,754 | 77,764,582 | 0.479345 | 0.69386 | 0.690838 | 40,488,500 | 16,446,672 | 24,041,828 | 30,452,751 |
| CLOCK | 2 | 77,764,582 | 53,722,754 | 77,764,582 | 0.480291 | 0.695229 | 0.690838 | 40,414,943 | 16,373,115 | 24,041,828 | 33,743,746 |
| LRU | 2 | 77,764,582 | 53,722,754 | 77,764,582 | 0.480291 | 0.695229 | 0.690838 | 40,414,943 | 16,373,115 | 24,041,828 | 33,743,746 |
w06
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 49,622,929 | 35,297,424 | 49,622,929 | 0.544198 | 0.765062 | 0.711313 | 22,618,212 | 8,292,707 | 14,325,505 | 18,186,396 |
| CLOCK | 2 | 49,622,929 | 35,297,424 | 49,622,929 | 0.544407 | 0.765355 | 0.711313 | 22,607,866 | 8,282,361 | 14,325,505 | 19,577,213 |
| LRU | 2 | 49,622,929 | 35,297,424 | 49,622,929 | 0.544407 | 0.765355 | 0.711313 | 22,607,866 | 8,282,361 | 14,325,505 | 19,577,213 |
| LRU | 2 | 49,622,929 | 35,297,424 | 49,622,929 | 0.547204 | 0.769287 | 0.711313 | 22,469,065 | 8,143,560 | 14,325,505 | 25,619,633 |
w10
w11
w12
w13
w15
w08
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 67,427,405 | 63,173,128 | 67,427,405 | 0.747595 | 0.79794 | 0.936906 | 17,019,033 | 12,764,756 | 4,254,277 | 53,779,782 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 34,816,425 | 23,611,076 | 34,816,425 | 0.571711 | 0.843034 | 0.678159 | 14,911,496 | 3,706,147 | 11,205,349 | 18,863,583 |
0.1
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 122,181,000 | 121,197,647 | 122,181,000 | 0.939226 | 0.946847 | 0.991952 | 7,425,409 | 6,442,056 | 983,353 | 114,402,995 |
| LRU | 2 | 122,181,000 | 121,197,647 | 122,181,000 | 0.939226 | 0.946847 | 0.991952 | 7,425,409 | 6,442,056 | 983,353 | 114,402,995 |
w04
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 69,392,150 | 37,014,046 | 69,392,150 | 0.0804198 | 0.150767 | 0.533404 | 63,811,647 | 31,433,543 | 32,378,104 | 4,178,732 |
| FIFO | 2 | 69,392,150 | 37,014,046 | 69,392,150 | 0.0804198 | 0.150767 | 0.533404 | 63,811,647 | 31,433,543 | 32,378,104 | 4,178,732 |
| Offline CLOCK | 2 | 69,392,150 | 37,014,046 | 69,392,150 | 0.0563394 | 0.105622 | 0.533404 | 65,482,636 | 33,104,532 | 32,378,104 | 5,456,197 |
| CLOCK | 2 | 69,392,150 | 37,014,046 | 69,392,150 | 0.0609872 | 0.114336 | 0.533404 | 65,160,119 | 32,782,015 | 32,378,104 | 8,469,520 |
| LRU | 2 | 69,392,150 | 37,014,046 | 69,392,150 | 0.0609872 | 0.114336 | 0.533404 | 65,160,119 | 32,782,015 | 32,378,104 | 8,469,520 |
w09
w10
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 46,173,369 | 45,610,348 | 46,173,369 | 0.673811 | 0.682128 | 0.987806 | 15,061,254 | 14,498,233 | 563,021 | 28,554,637 |
| LRU | 2 | 46,173,369 | 45,610,348 | 46,173,369 | 0.673811 | 0.682128 | 0.987806 | 15,061,254 | 14,498,233 | 563,021 | 28,554,637 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0227715 | 0.196703 | 0.115766 | 44,322,716 | 4,217,819 | 40,104,897 | 1,454,271 |
| CLOCK | 2 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0235835 | 0.203716 | 0.115766 | 44,285,889 | 4,180,992 | 40,104,897 | 1,981,223 |
| LRU | 2 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0235835 | 0.203716 | 0.115766 | 44,285,889 | 4,180,992 | 40,104,897 | 1,981,223 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 39,822,877 | 36,125,939 | 39,822,877 | 0.313352 | 0.345419 | 0.907165 | 27,344,279 | 23,647,341 | 3,696,938 | 30,610,813 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 2 | 33,628,757 | 33,485,932 | 33,628,757 | 0.928706 | 0.932667 | 0.995753 | 2,397,523 | 2,254,698 | 142,825 | 25,964,162 |
| CLOCK | 2 | 33,628,757 | 33,485,932 | 33,628,757 | 0.929771 | 0.933737 | 0.995753 | 2,361,705 | 2,218,880 | 142,825 | 27,551,487 |
| LRU | 2 | 33,628,757 | 33,485,932 | 33,628,757 | 0.929771 | 0.933737 | 0.995753 | 2,361,705 | 2,218,880 | 142,825 | 27,551,487 |
| LRU | 2 | 33,628,757 | 33,485,932 | 33,628,757 | 0.931848 | 0.935822 | 0.995753 | 2,291,871 | 2,149,046 | 142,825 | 27,968,376 |
w08
w07
w14
0.25
w02
w04
w06
w09
w10
w11
w12
w13
w15
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 2 | 44,464,937 | 43,086,145 | 44,464,937 | 0.811928 | 0.83791 | 0.968991 | 8,362,624 | 6,983,832 | 1,378,792 | 27,205,150 |
| LRU | 2 | 44,464,937 | 43,086,145 | 44,464,937 | 0.811928 | 0.83791 | 0.968991 | 8,362,624 | 6,983,832 | 1,378,792 | 27,205,150 |
| LRU | 2 | 44,464,937 | 43,086,145 | 44,464,937 | 0.797796 | 0.823326 | 0.968991 | 8,990,978 | 7,612,186 | 1,378,792 | 34,146,524 |
w07
w14
0.5
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 122,181,000 | 120,991,817 | 122,181,000 | 0.00784728 | 0.00792441 | 0.990267 | 121,222,211 | 120,033,028 | 1,189,183 | 120,579,310 |
w04
w06
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 2 | 49,622,929 | 27,753,460 | 49,622,929 | 0.344725 | 0.616365 | 0.559287 | 32,516,654 | 10,647,185 | 21,869,469 | 7,897,873 |
| Offline CLOCK | 2 | 49,622,929 | 27,753,460 | 49,622,929 | 0.344725 | 0.616365 | 0.559287 | 32,516,654 | 10,647,185 | 21,869,469 | 7,897,873 |
| LRU | 2 | 49,622,929 | 27,753,460 | 49,622,929 | 0.344725 | 0.616365 | 0.559287 | 32,516,654 | 10,647,185 | 21,869,469 | 7,897,873 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 2 | 48,342,350 | 35,038,495 | 48,342,350 | 0.379108 | 0.523052 | 0.724799 | 30,015,382 | 16,711,527 | 13,303,855 | 10,506,137 |
| Offline CLOCK | 2 | 48,342,350 | 35,038,495 | 48,342,350 | 0.379108 | 0.523052 | 0.724799 | 30,015,382 | 16,711,527 | 13,303,855 | 10,506,137 |
| LRU | 2 | 48,342,350 | 35,038,495 | 48,342,350 | 0.379108 | 0.523052 | 0.724799 | 30,015,382 | 16,711,527 | 13,303,855 | 10,506,137 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 46,173,369 | 44,066,678 | 46,173,369 | 0.178686 | 0.187228 | 0.954374 | 37,922,853 | 35,816,162 | 2,106,691 | 41,478,434 |
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 2 | 39,822,877 | 24,252,535 | 39,822,877 | 0.19354 | 0.317794 | 0.60901 | 32,115,570 | 16,545,228 | 15,570,342 | 2,457,084 |
| Offline CLOCK | 2 | 39,822,877 | 24,252,535 | 39,822,877 | 0.19354 | 0.317794 | 0.60901 | 32,115,570 | 16,545,228 | 15,570,342 | 2,457,084 |
| LRU | 2 | 39,822,877 | 24,252,535 | 39,822,877 | 0.19354 | 0.317794 | 0.60901 | 32,115,570 | 16,545,228 | 15,570,342 | 2,457,084 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 2 | 33,628,757 | 33,437,060 | 33,628,757 | 0.70064 | 0.704657 | 0.9943 | 10,067,091 | 9,875,394 | 191,697 | 27,909,833 |
w08
w07
w14
Individual Result Flash Admission Treshold: 4
0.005
w02
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 67,427,405 | 65,330,896 | 67,427,405 | 0.796287 | 0.82184 | 0.968907 | 13,735,869 | 11,639,360 | 2,096,509 | 34,847,477 |
| LRU | 4 | 67,427,405 | 65,330,896 | 67,427,405 | 0.796287 | 0.82184 | 0.968907 | 13,735,869 | 11,639,360 | 2,096,509 | 34,847,477 |
w08
w12
w13
w03
w04
w09
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 46,173,369 | 46,126,372 | 46,173,369 | 0.954234 | 0.955206 | 0.998982 | 2,113,161 | 2,066,164 | 46,997 | 36,525,691 |
| LRU | 4 | 46,173,369 | 46,126,372 | 46,173,369 | 0.954234 | 0.955206 | 0.998982 | 2,113,161 | 2,066,164 | 46,997 | 36,525,691 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 34,816,425 | 23,912,372 | 34,816,425 | 0.587125 | 0.854855 | 0.686813 | 14,374,815 | 3,470,762 | 10,904,053 | 6,443,234 |
| LRU | 4 | 34,816,425 | 23,912,372 | 34,816,425 | 0.587125 | 0.854855 | 0.686813 | 14,374,815 | 3,470,762 | 10,904,053 | 6,443,234 |
| LRU | 4 | 34,816,425 | 23,912,372 | 34,816,425 | 0.578744 | 0.842652 | 0.686813 | 14,666,613 | 3,762,560 | 10,904,053 | 9,906,890 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 48,342,350 | 46,272,453 | 48,342,350 | 0.759306 | 0.793272 | 0.957183 | 11,635,692 | 9,565,795 | 2,069,897 | 21,739,841 |
0.01
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 4 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989422 | 0.994813 | 0.99458 | 1,292,462 | 630,294 | 662,168 | 119,935,950 |
| CLOCK | 4 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989424 | 0.994816 | 0.99458 | 1,292,172 | 630,004 | 662,168 | 120,282,188 |
| LRU | 4 | 122,181,000 | 121,518,832 | 122,181,000 | 0.989424 | 0.994816 | 0.99458 | 1,292,172 | 630,004 | 662,168 | 120,282,188 |
w07
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 44,464,937 | 44,185,479 | 44,464,937 | 0.939765 | 0.945709 | 0.993715 | 2,678,328 | 2,398,870 | 279,458 | 22,141,070 |
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 39,822,877 | 37,675,216 | 39,822,877 | 0.455345 | 0.481302 | 0.94607 | 21,689,731 | 19,542,070 | 2,147,661 | 27,987,053 |
w03
w04
w09
w11
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 34,816,425 | 23,611,076 | 34,816,425 | 0.562414 | 0.829325 | 0.678159 | 15,235,166 | 4,029,817 | 11,205,349 | 5,628,423 |
| LRU | 4 | 34,816,425 | 23,611,076 | 34,816,425 | 0.562414 | 0.829325 | 0.678159 | 15,235,166 | 4,029,817 | 11,205,349 | 5,628,423 |
w10
0.1
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 122,181,000 | 121,197,647 | 122,181,000 | 0.972547 | 0.980438 | 0.991952 | 3,354,199 | 2,370,846 | 983,353 | 120,197,786 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 67,427,405 | 57,353,172 | 67,427,405 | 0.439657 | 0.516884 | 0.850591 | 37,782,471 | 27,708,238 | 10,074,233 | 38,819,986 |
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 4 | 44,464,937 | 43,653,785 | 44,464,937 | 0.856828 | 0.872749 | 0.981757 | 6,366,130 | 5,554,978 | 811,152 | 17,227,180 |
| CLOCK | 4 | 44,464,937 | 43,653,785 | 44,464,937 | 0.858664 | 0.874619 | 0.981757 | 6,284,499 | 5,473,347 | 811,152 | 18,712,372 |
| LRU | 4 | 44,464,937 | 43,653,785 | 44,464,937 | 0.858664 | 0.874619 | 0.981757 | 6,284,499 | 5,473,347 | 811,152 | 18,712,372 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 4 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0243175 | 0.210058 | 0.115766 | 44,252,594 | 4,147,697 | 40,104,897 | 4,752,677 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 4 | 39,822,877 | 36,125,939 | 39,822,877 | 0.32768 | 0.361213 | 0.907165 | 26,773,714 | 23,076,776 | 3,696,938 | 4,499,006 |
| CLOCK | 4 | 39,822,877 | 36,125,939 | 39,822,877 | 0.335612 | 0.369957 | 0.907165 | 26,457,835 | 22,760,897 | 3,696,938 | 6,866,560 |
| LRU | 4 | 39,822,877 | 36,125,939 | 39,822,877 | 0.335612 | 0.369957 | 0.907165 | 26,457,835 | 22,760,897 | 3,696,938 | 6,866,560 |
w03
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 84,712,978 | 60,006,930 | 84,712,978 | 0.565208 | 0.797916 | 0.708356 | 36,832,483 | 12,126,435 | 24,706,048 | 10,543,862 |
| LRU | 4 | 84,712,978 | 60,006,930 | 84,712,978 | 0.565208 | 0.797916 | 0.708356 | 36,832,483 | 12,126,435 | 24,706,048 | 10,543,862 |
w04
w09
w11
w14
w10
0.25
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 4 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0213398 | 0.0215327 | 0.99104 | 119,573,683 | 118,478,956 | 1,094,727 | 5,908,788 |
| CLOCK | 4 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0223048 | 0.0225064 | 0.99104 | 119,455,779 | 118,361,052 | 1,094,727 | 8,874,315 |
| LRU | 4 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0223048 | 0.0225064 | 0.99104 | 119,455,779 | 118,361,052 | 1,094,727 | 8,874,315 |
w07
w08
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 4 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0161749 | 0.173601 | 0.0931726 | 44,621,908 | 3,492,273 | 41,129,635 | 418,348 |
| CLOCK | 4 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0164436 | 0.176486 | 0.0931726 | 44,609,719 | 3,480,084 | 41,129,635 | 573,549 |
| LRU | 4 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0164436 | 0.176486 | 0.0931726 | 44,609,719 | 3,480,084 | 41,129,635 | 573,549 |
w13
w03
w04
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 77,764,582 | 41,130,089 | 77,764,582 | 0.385699 | 0.72924 | 0.528905 | 47,770,869 | 11,136,376 | 36,634,493 | 4,703,795 |
| LRU | 4 | 77,764,582 | 41,130,089 | 77,764,582 | 0.385699 | 0.72924 | 0.528905 | 47,770,869 | 11,136,376 | 36,634,493 | 4,703,795 |
w09
w11
w14
w10
0.5
w02
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 4 | 67,427,405 | 54,823,537 | 67,427,405 | 0.317374 | 0.390338 | 0.813075 | 46,027,701 | 33,423,833 | 12,603,868 | 2,918,869 |
| Offline CLOCK | 4 | 67,427,405 | 54,823,537 | 67,427,405 | 0.317374 | 0.390338 | 0.813075 | 46,027,701 | 33,423,833 | 12,603,868 | 2,918,869 |
| LRU | 4 | 67,427,405 | 54,823,537 | 67,427,405 | 0.317374 | 0.390338 | 0.813075 | 46,027,701 | 33,423,833 | 12,603,868 | 2,918,869 |
w08
w12
w13
w03
w04
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 49,622,929 | 27,753,460 | 49,622,929 | 0.42463 | 0.759235 | 0.559287 | 28,551,541 | 6,682,072 | 21,869,469 | 2,600,004 |
| LRU | 4 | 49,622,929 | 27,753,460 | 49,622,929 | 0.42463 | 0.759235 | 0.559287 | 28,551,541 | 6,682,072 | 21,869,469 | 2,600,004 |
w11
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 4 | 34,816,425 | 20,357,714 | 34,816,425 | 0.443907 | 0.759185 | 0.584716 | 19,361,154 | 4,902,443 | 14,458,711 | 2,179,155 |
| LRU | 4 | 34,816,425 | 20,357,714 | 34,816,425 | 0.443907 | 0.759185 | 0.584716 | 19,361,154 | 4,902,443 | 14,458,711 | 2,179,155 |
w10
Individual Result Flash Admission Treshold: 8
0.005
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 8 | 69,392,150 | 45,319,346 | 69,392,150 | 0.402949 | 0.616988 | 0.65309 | 41,430,643 | 17,357,839 | 24,072,804 | 27,972,644 |
| CLOCK | 8 | 69,392,150 | 45,319,346 | 69,392,150 | 0.403302 | 0.617528 | 0.65309 | 41,406,171 | 17,333,367 | 24,072,804 | 30,762,452 |
| LRU | 8 | 69,392,150 | 45,319,346 | 69,392,150 | 0.403302 | 0.617528 | 0.65309 | 41,406,171 | 17,333,367 | 24,072,804 | 30,762,452 |
w07
w10
w11
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 8 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0874082 | 0.420935 | 0.207652 | 41,391,086 | 5,453,741 | 35,937,345 | 3,389,388 |
| CLOCK | 8 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0878058 | 0.42285 | 0.207652 | 41,373,049 | 5,435,704 | 35,937,345 | 4,099,183 |
| LRU | 8 | 45,355,529 | 9,418,184 | 45,355,529 | 0.0878058 | 0.42285 | 0.207652 | 41,373,049 | 5,435,704 | 35,937,345 | 4,099,183 |
w13
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 8 | 33,628,757 | 33,564,039 | 33,628,757 | 0.992251 | 0.994164 | 0.998076 | 260,584 | 195,866 | 64,718 | 3,467,067 |
| CLOCK | 8 | 33,628,757 | 33,564,039 | 33,628,757 | 0.992743 | 0.994657 | 0.998076 | 244,052 | 179,334 | 64,718 | 3,537,762 |
| LRU | 8 | 33,628,757 | 33,564,039 | 33,628,757 | 0.992743 | 0.994657 | 0.998076 | 244,052 | 179,334 | 64,718 | 3,537,762 |
w02
w14
w09
0.01
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 67,427,405 | 63,173,128 | 67,427,405 | 0.7313 | 0.780548 | 0.936906 | 18,117,764 | 13,863,487 | 4,254,277 | 21,855,575 |
| FIFO | 8 | 67,427,405 | 63,173,128 | 67,427,405 | 0.7313 | 0.780548 | 0.936906 | 18,117,764 | 13,863,487 | 4,254,277 | 21,855,575 |
| Offline CLOCK | 8 | 67,427,405 | 63,173,128 | 67,427,405 | 0.706494 | 0.754072 | 0.936906 | 19,790,325 | 15,536,048 | 4,254,277 | 22,881,565 |
| CLOCK | 8 | 67,427,405 | 63,173,128 | 67,427,405 | 0.7159 | 0.764111 | 0.936906 | 19,156,101 | 14,901,824 | 4,254,277 | 29,381,321 |
| LRU | 8 | 67,427,405 | 63,173,128 | 67,427,405 | 0.7159 | 0.764111 | 0.936906 | 19,156,101 | 14,901,824 | 4,254,277 | 29,381,321 |
w10
w11
w12
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 8 | 39,822,877 | 37,675,216 | 39,822,877 | 0.489541 | 0.517447 | 0.94607 | 20,327,959 | 18,180,298 | 2,147,661 | 6,000,109 |
| CLOCK | 8 | 39,822,877 | 37,675,216 | 39,822,877 | 0.49744 | 0.525797 | 0.94607 | 20,013,368 | 17,865,707 | 2,147,661 | 9,176,668 |
| LRU | 8 | 39,822,877 | 37,675,216 | 39,822,877 | 0.49744 | 0.525797 | 0.94607 | 20,013,368 | 17,865,707 | 2,147,661 | 9,176,668 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 33,628,757 | 33,549,241 | 33,628,757 | 0.988815 | 0.991158 | 0.997635 | 376,142 | 296,626 | 79,516 | 3,319,943 |
| LRU | 8 | 33,628,757 | 33,549,241 | 33,628,757 | 0.988815 | 0.991158 | 0.997635 | 376,142 | 296,626 | 79,516 | 3,319,943 |
| LRU | 8 | 33,628,757 | 33,549,241 | 33,628,757 | 0.988708 | 0.991051 | 0.997635 | 379,752 | 300,236 | 79,516 | 3,616,500 |
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 122,181,000 | 121,518,832 | 122,181,000 | 0.99003 | 0.995425 | 0.99458 | 1,218,151 | 555,983 | 662,168 | 119,473,628 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 34,816,425 | 23,611,076 | 34,816,425 | 0.557692 | 0.822362 | 0.678159 | 15,399,569 | 4,194,220 | 11,205,349 | 791,881 |
| LRU | 8 | 34,816,425 | 23,611,076 | 34,816,425 | 0.557692 | 0.822362 | 0.678159 | 15,399,569 | 4,194,220 | 11,205,349 | 791,881 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 49,622,929 | 35,297,424 | 49,622,929 | 0.546408 | 0.768168 | 0.711313 | 22,508,576 | 8,183,071 | 14,325,505 | 8,894,047 |
0.1
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 67,427,405 | 57,353,172 | 67,427,405 | 0.445627 | 0.523902 | 0.850591 | 37,379,964 | 27,305,731 | 10,074,233 | 3,127,934 |
| LRU | 8 | 67,427,405 | 57,353,172 | 67,427,405 | 0.445627 | 0.523902 | 0.850591 | 37,379,964 | 27,305,731 | 10,074,233 | 3,127,934 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 8 | 48,342,350 | 38,823,847 | 48,342,350 | 0.643966 | 0.801848 | 0.803102 | 17,211,510 | 7,693,007 | 9,518,503 | 1,053,613 |
| Offline CLOCK | 8 | 48,342,350 | 38,823,847 | 48,342,350 | 0.643966 | 0.801848 | 0.803102 | 17,211,510 | 7,693,007 | 9,518,503 | 1,053,613 |
| LRU | 8 | 48,342,350 | 38,823,847 | 48,342,350 | 0.643966 | 0.801848 | 0.803102 | 17,211,510 | 7,693,007 | 9,518,503 | 1,053,613 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 46,173,369 | 45,610,348 | 46,173,369 | 0.673585 | 0.681899 | 0.987806 | 15,071,700 | 14,508,679 | 563,021 | 15,198,021 |
| LRU | 8 | 46,173,369 | 45,610,348 | 46,173,369 | 0.673585 | 0.681899 | 0.987806 | 15,071,700 | 14,508,679 | 563,021 | 15,198,021 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0306928 | 0.265128 | 0.115766 | 43,963,441 | 3,858,544 | 40,104,897 | 583,410 |
| LRU | 8 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0306928 | 0.265128 | 0.115766 | 43,963,441 | 3,858,544 | 40,104,897 | 583,410 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 39,822,877 | 36,125,939 | 39,822,877 | 0.39944 | 0.440317 | 0.907165 | 23,916,019 | 20,219,081 | 3,696,938 | 21,643,199 |
w15
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 122,181,000 | 121,197,647 | 122,181,000 | 0.930669 | 0.93822 | 0.991952 | 8,470,909 | 7,487,556 | 983,353 | 111,793,529 |
| LRU | 8 | 122,181,000 | 121,197,647 | 122,181,000 | 0.930669 | 0.93822 | 0.991952 | 8,470,909 | 7,487,556 | 983,353 | 111,793,529 |
| LRU | 8 | 122,181,000 | 121,197,647 | 122,181,000 | 0.971228 | 0.979108 | 0.991952 | 3,515,452 | 2,532,099 | 983,353 | 119,227,728 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 34,816,425 | 22,828,337 | 34,816,425 | 0.537514 | 0.819785 | 0.655677 | 16,102,098 | 4,114,010 | 11,988,088 | 292,863 |
| LRU | 8 | 34,816,425 | 22,828,337 | 34,816,425 | 0.537514 | 0.819785 | 0.655677 | 16,102,098 | 4,114,010 | 11,988,088 | 292,863 |
w09
0.25
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 67,427,405 | 56,285,198 | 67,427,405 | 0.418976 | 0.501916 | 0.834753 | 39,176,943 | 28,034,736 | 11,142,207 | 29,390,771 |
w10
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 46,173,369 | 45,060,720 | 46,173,369 | 0.473596 | 0.48529 | 0.975903 | 24,305,851 | 23,193,202 | 1,112,649 | 6,102,159 |
| LRU | 8 | 46,173,369 | 45,060,720 | 46,173,369 | 0.473596 | 0.48529 | 0.975903 | 24,305,851 | 23,193,202 | 1,112,649 | 6,102,159 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0217499 | 0.233437 | 0.0931726 | 44,369,051 | 3,239,416 | 41,129,635 | 215,904 |
| FIFO | 8 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0217499 | 0.233437 | 0.0931726 | 44,369,051 | 3,239,416 | 41,129,635 | 215,904 |
| Offline CLOCK | 8 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0208248 | 0.223508 | 0.0931726 | 44,411,007 | 3,281,372 | 41,129,635 | 272,001 |
| CLOCK | 8 | 45,355,529 | 4,225,894 | 45,355,529 | 0.02088 | 0.224101 | 0.0931726 | 44,408,504 | 3,278,869 | 41,129,635 | 321,007 |
| LRU | 8 | 45,355,529 | 4,225,894 | 45,355,529 | 0.02088 | 0.224101 | 0.0931726 | 44,408,504 | 3,278,869 | 41,129,635 | 321,007 |
w13
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 33,628,757 | 33,457,330 | 33,628,757 | 0.942933 | 0.947764 | 0.994902 | 1,919,095 | 1,747,668 | 171,427 | 1,817,793 |
| LRU | 8 | 33,628,757 | 33,457,330 | 33,628,757 | 0.942933 | 0.947764 | 0.994902 | 1,919,095 | 1,747,668 | 171,427 | 1,817,793 |
w02
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 34,816,425 | 21,280,513 | 34,816,425 | 0.522489 | 0.854829 | 0.611221 | 16,625,219 | 3,089,307 | 13,535,912 | 3,376,852 |
w09
0.5
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 8 | 67,427,405 | 54,823,537 | 67,427,405 | 0.417778 | 0.513825 | 0.813075 | 39,257,726 | 26,653,858 | 12,603,868 | 1,373,962 |
| Offline CLOCK | 8 | 67,427,405 | 54,823,537 | 67,427,405 | 0.417778 | 0.513825 | 0.813075 | 39,257,726 | 26,653,858 | 12,603,868 | 1,373,962 |
| LRU | 8 | 67,427,405 | 54,823,537 | 67,427,405 | 0.417778 | 0.513825 | 0.813075 | 39,257,726 | 26,653,858 | 12,603,868 | 1,373,962 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 8 | 48,342,350 | 35,038,495 | 48,342,350 | 0.623581 | 0.86035 | 0.724799 | 18,196,968 | 4,893,113 | 13,303,855 | 1,053,071 |
| Offline CLOCK | 8 | 48,342,350 | 35,038,495 | 48,342,350 | 0.623581 | 0.86035 | 0.724799 | 18,196,968 | 4,893,113 | 13,303,855 | 1,053,071 |
| FIFO | 8 | 48,342,350 | 35,038,495 | 48,342,350 | 0.623581 | 0.86035 | 0.724799 | 18,196,968 | 4,893,113 | 13,303,855 | 1,053,071 |
| LRU | 8 | 48,342,350 | 35,038,495 | 48,342,350 | 0.623581 | 0.86035 | 0.724799 | 18,196,968 | 4,893,113 | 13,303,855 | 1,053,071 |
| LRU | 8 | 48,342,350 | 35,038,495 | 48,342,350 | 0.623581 | 0.86035 | 0.724799 | 18,196,968 | 4,893,113 | 13,303,855 | 1,053,071 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 8 | 46,173,369 | 44,066,678 | 46,173,369 | 0.390306 | 0.408965 | 0.954374 | 28,151,627 | 26,044,936 | 2,106,691 | 2,514,807 |
| FIFO | 8 | 46,173,369 | 44,066,678 | 46,173,369 | 0.390306 | 0.408965 | 0.954374 | 28,151,627 | 26,044,936 | 2,106,691 | 2,514,807 |
| Offline CLOCK | 8 | 46,173,369 | 44,066,678 | 46,173,369 | 0.380697 | 0.398897 | 0.954374 | 28,595,292 | 26,488,601 | 2,106,691 | 3,492,535 |
| CLOCK | 8 | 46,173,369 | 44,066,678 | 46,173,369 | 0.383318 | 0.401644 | 0.954374 | 28,474,264 | 26,367,573 | 2,106,691 | 5,341,533 |
| LRU | 8 | 46,173,369 | 44,066,678 | 46,173,369 | 0.383318 | 0.401644 | 0.954374 | 28,474,264 | 26,367,573 | 2,106,691 | 5,341,533 |
w12
w13
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 8 | 33,628,757 | 33,437,060 | 33,628,757 | 0.935747 | 0.941112 | 0.9943 | 2,160,753 | 1,969,056 | 191,697 | 1,582,283 |
| LRU | 8 | 33,628,757 | 33,437,060 | 33,628,757 | 0.935747 | 0.941112 | 0.9943 | 2,160,753 | 1,969,056 | 191,697 | 1,582,283 |
| LRU | 8 | 33,628,757 | 33,437,060 | 33,628,757 | 0.935747 | 0.941112 | 0.9943 | 2,160,753 | 1,969,056 | 191,697 | 3,546,077 |
w02
w14
w09
Individual Result Flash Admission Treshold: 16
0.005
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 16 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991617 | 0.996058 | 0.995541 | 1,024,240 | 479,441 | 544,799 | 117,634,048 |
| CLOCK | 16 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991623 | 0.996064 | 0.995541 | 1,023,500 | 478,701 | 544,799 | 117,912,348 |
| LRU | 16 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991623 | 0.996064 | 0.995541 | 1,023,500 | 478,701 | 544,799 | 117,912,348 |
w03
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 16 | 44,464,937 | 44,221,481 | 44,464,937 | 0.945054 | 0.950257 | 0.994525 | 2,443,185 | 2,199,729 | 243,456 | 1,338,281 |
| CLOCK | 16 | 44,464,937 | 44,221,481 | 44,464,937 | 0.947651 | 0.952868 | 0.994525 | 2,327,684 | 2,084,228 | 243,456 | 1,853,554 |
| LRU | 16 | 44,464,937 | 44,221,481 | 44,464,937 | 0.947651 | 0.952868 | 0.994525 | 2,327,684 | 2,084,228 | 243,456 | 1,853,554 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 48,342,350 | 46,272,453 | 48,342,350 | 0.796947 | 0.832597 | 0.957183 | 9,816,053 | 7,746,156 | 2,069,897 | 8,333,280 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 46,173,369 | 46,126,372 | 46,173,369 | 0.948637 | 0.949604 | 0.998982 | 2,371,594 | 2,324,597 | 46,997 | 16,164,578 |
| LRU | 16 | 46,173,369 | 46,126,372 | 46,173,369 | 0.948637 | 0.949604 | 0.998982 | 2,371,594 | 2,324,597 | 46,997 | 16,164,578 |
| LRU | 16 | 46,173,369 | 46,126,372 | 46,173,369 | 0.945362 | 0.946325 | 0.998982 | 2,522,836 | 2,475,839 | 46,997 | 18,481,002 |
w12
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 33,628,757 | 33,564,039 | 33,628,757 | 0.993783 | 0.995699 | 0.998076 | 209,076 | 144,358 | 64,718 | 89,150 |
| FIFO | 16 | 33,628,757 | 33,564,039 | 33,628,757 | 0.993783 | 0.995699 | 0.998076 | 209,076 | 144,358 | 64,718 | 89,150 |
| Offline CLOCK | 16 | 33,628,757 | 33,564,039 | 33,628,757 | 0.993717 | 0.995633 | 0.998076 | 211,276 | 146,558 | 64,718 | 106,410 |
| CLOCK | 16 | 33,628,757 | 33,564,039 | 33,628,757 | 0.993469 | 0.995385 | 0.998076 | 219,632 | 154,914 | 64,718 | 139,882 |
| LRU | 16 | 33,628,757 | 33,564,039 | 33,628,757 | 0.993469 | 0.995385 | 0.998076 | 219,632 | 154,914 | 64,718 | 139,882 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 49,622,929 | 36,967,349 | 49,622,929 | 0.585463 | 0.785893 | 0.744965 | 20,570,550 | 7,914,970 | 12,655,580 | 8,098,092 |
w06
0.01
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 16 | 122,181,000 | 121,518,832 | 122,181,000 | 0.990154 | 0.995549 | 0.99458 | 1,203,022 | 540,854 | 662,168 | 117,540,694 |
| CLOCK | 16 | 122,181,000 | 121,518,832 | 122,181,000 | 0.990154 | 0.995549 | 0.99458 | 1,203,023 | 540,855 | 662,168 | 117,831,321 |
| LRU | 16 | 122,181,000 | 121,518,832 | 122,181,000 | 0.990154 | 0.995549 | 0.99458 | 1,203,023 | 540,855 | 662,168 | 117,831,321 |
w03
w08
w10
w11
w12
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 33,628,757 | 33,549,241 | 33,628,757 | 0.992535 | 0.994887 | 0.997635 | 251,052 | 171,536 | 79,516 | 48,201 |
| LRU | 16 | 33,628,757 | 33,549,241 | 33,628,757 | 0.992535 | 0.994887 | 0.997635 | 251,052 | 171,536 | 79,516 | 48,201 |
w09
w06
0.1
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 16 | 122,181,000 | 121,197,647 | 122,181,000 | 0.951908 | 0.959631 | 0.991952 | 5,875,966 | 4,892,613 | 983,353 | 115,493,835 |
| CLOCK | 16 | 122,181,000 | 121,197,647 | 122,181,000 | 0.960098 | 0.967888 | 0.991952 | 4,875,267 | 3,891,914 | 983,353 | 117,278,891 |
| LRU | 16 | 122,181,000 | 121,197,647 | 122,181,000 | 0.960098 | 0.967888 | 0.991952 | 4,875,267 | 3,891,914 | 983,353 | 117,278,891 |
w03
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 16 | 84,712,978 | 60,006,930 | 84,712,978 | 0.626006 | 0.883746 | 0.708356 | 31,682,110 | 6,976,062 | 24,706,048 | 233,683 |
| Offline CLOCK | 16 | 84,712,978 | 60,006,930 | 84,712,978 | 0.626006 | 0.883746 | 0.708356 | 31,682,110 | 6,976,062 | 24,706,048 | 233,683 |
| LRU | 16 | 84,712,978 | 60,006,930 | 84,712,978 | 0.626006 | 0.883746 | 0.708356 | 31,682,110 | 6,976,062 | 24,706,048 | 233,683 |
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 44,464,937 | 43,653,785 | 44,464,937 | 0.920315 | 0.937416 | 0.981757 | 3,543,173 | 2,732,021 | 811,152 | 2,908,400 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 16 | 48,342,350 | 38,823,847 | 48,342,350 | 0.691971 | 0.861623 | 0.803102 | 14,890,827 | 5,372,324 | 9,518,503 | 231,679 |
| Offline CLOCK | 16 | 48,342,350 | 38,823,847 | 48,342,350 | 0.691971 | 0.861623 | 0.803102 | 14,890,827 | 5,372,324 | 9,518,503 | 231,679 |
| LRU | 16 | 48,342,350 | 38,823,847 | 48,342,350 | 0.691971 | 0.861623 | 0.803102 | 14,890,827 | 5,372,324 | 9,518,503 | 231,679 |
w11
w12
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 16 | 33,628,757 | 33,485,932 | 33,628,757 | 0.991735 | 0.995965 | 0.995753 | 277,952 | 135,127 | 142,825 | 48,201 |
| Offline CLOCK | 16 | 33,628,757 | 33,485,932 | 33,628,757 | 0.991735 | 0.995965 | 0.995753 | 277,952 | 135,127 | 142,825 | 48,201 |
| LRU | 16 | 33,628,757 | 33,485,932 | 33,628,757 | 0.991735 | 0.995965 | 0.995753 | 277,952 | 135,127 | 142,825 | 48,201 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 49,622,929 | 30,146,578 | 49,622,929 | 0.538347 | 0.886149 | 0.607513 | 22,908,569 | 3,432,218 | 19,476,351 | 3,572,736 |
w06
0.25
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 16 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0309878 | 0.0312679 | 0.99104 | 118,394,881 | 117,300,154 | 1,094,727 | 1,558,150 |
| CLOCK | 16 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0316451 | 0.0319312 | 0.99104 | 118,314,568 | 117,219,841 | 1,094,727 | 2,916,797 |
| LRU | 16 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0316451 | 0.0319312 | 0.99104 | 118,314,568 | 117,219,841 | 1,094,727 | 2,916,797 |
w03
w08
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 48,342,350 | 36,505,670 | 48,342,350 | 0.673546 | 0.891938 | 0.755149 | 15,781,570 | 3,944,890 | 11,836,680 | 231,672 |
| LRU | 16 | 48,342,350 | 36,505,670 | 48,342,350 | 0.673546 | 0.891938 | 0.755149 | 15,781,570 | 3,944,890 | 11,836,680 | 231,672 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 46,173,369 | 45,060,720 | 46,173,369 | 0.626112 | 0.641572 | 0.975903 | 17,263,655 | 16,151,006 | 1,112,649 | 1,724,890 |
| FIFO | 16 | 46,173,369 | 45,060,720 | 46,173,369 | 0.626112 | 0.641572 | 0.975903 | 17,263,655 | 16,151,006 | 1,112,649 | 1,724,890 |
| Offline CLOCK | 16 | 46,173,369 | 45,060,720 | 46,173,369 | 0.617708 | 0.63296 | 0.975903 | 17,651,716 | 16,539,067 | 1,112,649 | 2,260,643 |
| CLOCK | 16 | 46,173,369 | 45,060,720 | 46,173,369 | 0.619576 | 0.634875 | 0.975903 | 17,565,466 | 16,452,817 | 1,112,649 | 3,786,174 |
| LRU | 16 | 46,173,369 | 45,060,720 | 46,173,369 | 0.619576 | 0.634875 | 0.975903 | 17,565,466 | 16,452,817 | 1,112,649 | 3,786,174 |
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0280756 | 0.301329 | 0.0931726 | 44,082,145 | 2,952,510 | 41,129,635 | 112,595 |
| LRU | 16 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0280756 | 0.301329 | 0.0931726 | 44,082,145 | 2,952,510 | 41,129,635 | 112,595 |
| LRU | 16 | 45,355,529 | 4,225,894 | 45,355,529 | 0.0280387 | 0.300933 | 0.0931726 | 44,083,818 | 2,954,183 | 41,129,635 | 3,064,122 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 33,628,757 | 33,457,330 | 33,628,757 | 0.991062 | 0.996139 | 0.994902 | 300,590 | 129,163 | 171,427 | 177,169 |
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 49,622,929 | 28,610,632 | 49,622,929 | 0.52995 | 0.919157 | 0.576561 | 23,325,279 | 2,312,982 | 21,012,297 | 144,839 |
| LRU | 16 | 49,622,929 | 28,610,632 | 49,622,929 | 0.52995 | 0.919157 | 0.576561 | 23,325,279 | 2,312,982 | 21,012,297 | 144,839 |
w06
0.5
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 16 | 122,181,000 | 120,991,817 | 122,181,000 | 0.0289424 | 0.0292269 | 0.990267 | 118,644,783 | 117,455,600 | 1,189,183 | 152,401 |
| LRU | 16 | 122,181,000 | 120,991,817 | 122,181,000 | 0.0289424 | 0.0292269 | 0.990267 | 118,644,783 | 117,455,600 | 1,189,183 | 152,401 |
w03
w08
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 44,464,937 | 42,584,668 | 44,464,937 | 0.909345 | 0.949496 | 0.957713 | 4,030,977 | 2,150,708 | 1,880,269 | 2,323,680 |
w10
w11
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 16 | 45,355,529 | 3,838,229 | 45,355,529 | 0.0272505 | 0.322013 | 0.0846254 | 44,119,570 | 2,602,270 | 41,517,300 | 110,695 |
| Offline CLOCK | 16 | 45,355,529 | 3,838,229 | 45,355,529 | 0.0272505 | 0.322013 | 0.0846254 | 44,119,570 | 2,602,270 | 41,517,300 | 110,695 |
| LRU | 16 | 45,355,529 | 3,838,229 | 45,355,529 | 0.0272505 | 0.322013 | 0.0846254 | 44,119,570 | 2,602,270 | 41,517,300 | 110,695 |
w15
w09
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 16 | 69,392,150 | 28,709,131 | 69,392,150 | 0.0756276 | 0.182798 | 0.413723 | 64,144,188 | 23,461,169 | 40,683,019 | 23,759,114 |
Individual Result Flash Admission Treshold: 32
0.005
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 32 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991678 | 0.996119 | 0.995541 | 1,016,816 | 472,017 | 544,799 | 115,334,370 |
| CLOCK | 32 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991682 | 0.996123 | 0.995541 | 1,016,332 | 471,533 | 544,799 | 115,602,715 |
| LRU | 32 | 122,181,000 | 121,636,201 | 122,181,000 | 0.991682 | 0.996123 | 0.995541 | 1,016,332 | 471,533 | 544,799 | 115,602,715 |
w03
w06
w07
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 46,173,369 | 46,126,372 | 46,173,369 | 0.948027 | 0.948993 | 0.998982 | 2,399,775 | 2,352,778 | 46,997 | 7,343,049 |
w12
w14
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 33,628,757 | 33,564,039 | 33,628,757 | 0.996125 | 0.998046 | 0.998076 | 130,306 | 65,588 | 64,718 | 741 |
| Offline CLOCK | 32 | 33,628,757 | 33,564,039 | 33,628,757 | 0.996125 | 0.998046 | 0.998076 | 130,306 | 65,588 | 64,718 | 741 |
| LRU | 32 | 33,628,757 | 33,564,039 | 33,628,757 | 0.996125 | 0.998046 | 0.998076 | 130,306 | 65,588 | 64,718 | 741 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 39,822,877 | 37,870,172 | 39,822,877 | 0.722895 | 0.76017 | 0.950965 | 11,035,124 | 9,082,419 | 1,952,705 | 11,268,240 |
w09
w10
0.01
w02
w03
w06
w07
w11
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 32 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0920275 | 0.499504 | 0.184238 | 41,181,571 | 4,182,241 | 36,999,330 | 2,006,121 |
| LRU | 32 | 45,355,529 | 8,356,199 | 45,355,529 | 0.0920275 | 0.499504 | 0.184238 | 41,181,571 | 4,182,241 | 36,999,330 | 2,006,121 |
w14
w15
w13
w09
w10
0.1
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 32 | 122,181,000 | 121,197,647 | 122,181,000 | 0.877839 | 0.884961 | 0.991952 | 14,925,789 | 13,942,436 | 983,353 | 101,634,441 |
| LRU | 32 | 122,181,000 | 121,197,647 | 122,181,000 | 0.877839 | 0.884961 | 0.991952 | 14,925,789 | 13,942,436 | 983,353 | 101,634,441 |
w03
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 32 | 69,392,150 | 37,014,046 | 69,392,150 | 0.115085 | 0.215757 | 0.533404 | 61,406,124 | 29,028,020 | 32,378,104 | 589,759 |
| CLOCK | 32 | 69,392,150 | 37,014,046 | 69,392,150 | 0.115172 | 0.215919 | 0.533404 | 61,400,124 | 29,022,020 | 32,378,104 | 1,077,291 |
| LRU | 32 | 69,392,150 | 37,014,046 | 69,392,150 | 0.115172 | 0.215919 | 0.533404 | 61,400,124 | 29,022,020 | 32,378,104 | 1,077,291 |
| LRU | 32 | 69,392,150 | 37,014,046 | 69,392,150 | 0.115107 | 0.215797 | 0.533404 | 61,404,628 | 29,026,524 | 32,378,104 | 29,284,777 |
w07
w11
w12
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 32 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0415563 | 0.358968 | 0.115766 | 43,470,721 | 3,365,824 | 40,104,897 | 217,701 |
| CLOCK | 32 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0416201 | 0.359519 | 0.115766 | 43,467,828 | 3,362,931 | 40,104,897 | 357,157 |
| LRU | 32 | 45,355,529 | 5,250,632 | 45,355,529 | 0.0416201 | 0.359519 | 0.115766 | 43,467,828 | 3,362,931 | 40,104,897 | 357,157 |
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 34,816,425 | 22,828,337 | 34,816,425 | 0.589769 | 0.899481 | 0.655677 | 14,282,766 | 2,294,678 | 11,988,088 | 44,768 |
| Offline CLOCK | 32 | 34,816,425 | 22,828,337 | 34,816,425 | 0.589769 | 0.899481 | 0.655677 | 14,282,766 | 2,294,678 | 11,988,088 | 44,768 |
| LRU | 32 | 34,816,425 | 22,828,337 | 34,816,425 | 0.589769 | 0.899481 | 0.655677 | 14,282,766 | 2,294,678 | 11,988,088 | 44,768 |
w15
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 39,822,877 | 36,125,939 | 39,822,877 | 0.65431 | 0.721269 | 0.907165 | 13,766,358 | 10,069,420 | 3,696,938 | 10,335,134 |
w09
w10
0.25
w02
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| Offline CLOCK | 32 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0477219 | 0.0481534 | 0.99104 | 116,350,287 | 115,255,560 | 1,094,727 | 371,411 |
| CLOCK | 32 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0477571 | 0.0481889 | 0.99104 | 116,345,986 | 115,251,259 | 1,094,727 | 697,109 |
| LRU | 32 | 122,181,000 | 121,086,273 | 122,181,000 | 0.0477571 | 0.0481889 | 0.99104 | 116,345,986 | 115,251,259 | 1,094,727 | 697,109 |
| LRU | 32 | 122,181,000 | 121,086,273 | 122,181,000 | 0.047737 | 0.0481685 | 0.99104 | 116,348,451 | 115,253,724 | 1,094,727 | 115,398,207 |
w03
w06
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 32 | 69,392,150 | 32,548,821 | 69,392,150 | 0.112625 | 0.24011 | 0.469056 | 61,576,846 | 24,733,517 | 36,843,329 | 229,782 |
| LRU | 32 | 69,392,150 | 32,548,821 | 69,392,150 | 0.112625 | 0.24011 | 0.469056 | 61,576,846 | 24,733,517 | 36,843,329 | 229,782 |
| LRU | 32 | 69,392,150 | 32,548,821 | 69,392,150 | 0.112625 | 0.24011 | 0.469056 | 61,576,846 | 24,733,517 | 36,843,329 | 24,959,097 |
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 67,427,405 | 56,285,198 | 67,427,405 | 0.625722 | 0.74959 | 0.834753 | 25,236,604 | 14,094,397 | 11,142,207 | 448,747 |
| Offline CLOCK | 32 | 67,427,405 | 56,285,198 | 67,427,405 | 0.625722 | 0.74959 | 0.834753 | 25,236,604 | 14,094,397 | 11,142,207 | 448,747 |
| LRU | 32 | 67,427,405 | 56,285,198 | 67,427,405 | 0.625722 | 0.74959 | 0.834753 | 25,236,604 | 14,094,397 | 11,142,207 | 448,747 |
w11
w12
w14
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 33,628,757 | 33,457,330 | 33,628,757 | 0.994251 | 0.999345 | 0.994902 | 193,341 | 21,914 | 171,427 | 735 |
| Offline CLOCK | 32 | 33,628,757 | 33,457,330 | 33,628,757 | 0.994251 | 0.999345 | 0.994902 | 193,341 | 21,914 | 171,427 | 735 |
| FIFO | 32 | 33,628,757 | 33,457,330 | 33,628,757 | 0.994251 | 0.999345 | 0.994902 | 193,341 | 21,914 | 171,427 | 735 |
| LRU | 32 | 33,628,757 | 33,457,330 | 33,628,757 | 0.994251 | 0.999345 | 0.994902 | 193,341 | 21,914 | 171,427 | 735 |
| LRU | 32 | 33,628,757 | 33,457,330 | 33,628,757 | 0.994251 | 0.999345 | 0.994902 | 193,341 | 21,914 | 171,427 | 735 |
w13
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| FIFO | 32 | 39,822,877 | 32,545,479 | 39,822,877 | 0.623246 | 0.762608 | 0.817256 | 15,003,424 | 7,726,026 | 7,277,398 | 271,011 |
| LRU | 32 | 39,822,877 | 32,545,479 | 39,822,877 | 0.623246 | 0.762608 | 0.817256 | 15,003,424 | 7,726,026 | 7,277,398 | 271,011 |
| LRU | 32 | 39,822,877 | 32,545,479 | 39,822,877 | 0.623246 | 0.762608 | 0.817256 | 15,003,424 | 7,726,026 | 7,277,398 | 7,985,618 |
w09
w10
0.5
w02
w03
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 84,712,978 | 54,525,816 | 84,712,978 | 0.616481 | 0.957784 | 0.643654 | 32,489,023 | 2,301,861 | 30,187,162 | 92,484 |
| Offline CLOCK | 32 | 84,712,978 | 54,525,816 | 84,712,978 | 0.616481 | 0.957784 | 0.643654 | 32,489,023 | 2,301,861 | 30,187,162 | 92,484 |
| FIFO | 32 | 84,712,978 | 54,525,816 | 84,712,978 | 0.616481 | 0.957784 | 0.643654 | 32,489,023 | 2,301,861 | 30,187,162 | 92,484 |
| LRU | 32 | 84,712,978 | 54,525,816 | 84,712,978 | 0.616481 | 0.957784 | 0.643654 | 32,489,023 | 2,301,861 | 30,187,162 | 92,484 |
| LRU | 32 | 84,712,978 | 54,525,816 | 84,712,978 | 0.616481 | 0.957784 | 0.643654 | 32,489,023 | 2,301,861 | 30,187,162 | 92,484 |
w06
w07
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 67,427,405 | 54,823,537 | 67,427,405 | 0.619989 | 0.762524 | 0.813075 | 25,623,167 | 13,019,299 | 12,603,868 | 448,552 |
| Offline CLOCK | 32 | 67,427,405 | 54,823,537 | 67,427,405 | 0.619989 | 0.762524 | 0.813075 | 25,623,167 | 13,019,299 | 12,603,868 | 448,552 |
| LRU | 32 | 67,427,405 | 54,823,537 | 67,427,405 | 0.619989 | 0.762524 | 0.813075 | 25,623,167 | 13,019,299 | 12,603,868 | 448,552 |
w11
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 46,173,369 | 44,066,678 | 46,173,369 | 0.819524 | 0.858703 | 0.954374 | 8,333,196 | 6,226,505 | 2,106,691 | 408,110 |
| Offline CLOCK | 32 | 46,173,369 | 44,066,678 | 46,173,369 | 0.819524 | 0.858703 | 0.954374 | 8,333,196 | 6,226,505 | 2,106,691 | 408,110 |
| LRU | 32 | 46,173,369 | 44,066,678 | 46,173,369 | 0.819524 | 0.858703 | 0.954374 | 8,333,196 | 6,226,505 | 2,106,691 | 408,110 |
w12
w14
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 34,816,425 | 20,357,714 | 34,816,425 | 0.552368 | 0.944678 | 0.584716 | 15,584,938 | 1,126,227 | 14,458,711 | 1,165,588 |
w15
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| CLOCK | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 733 |
| Offline CLOCK | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 733 |
| FIFO | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 733 |
| LRU | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 733 |
| LRU | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 733 |
| LRU | 32 | 33,628,757 | 33,437,060 | 33,628,757 | 0.993741 | 0.999438 | 0.9943 | 210,474 | 18,777 | 191,697 | 19,308 |
w13
w09
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 49,622,929 | 27,753,460 | 49,622,929 | 0.536261 | 0.958829 | 0.559287 | 23,012,102 | 1,142,633 | 21,869,469 | 1,200,776 |
w10
| Algorithm | Flash Admission Treshold | Overall Request | Flash Request | DRAM Request | Overall Miss Ratio | Flash Miss Ratio | DRAM Miss Ratio | Overall Hit | Flash Hit | DRAM Hit | Write |
| LRU | 32 | 48,342,350 | 35,038,495 | 48,342,350 | 0.677423 | 0.934635 | 0.724799 | 15,594,138 | 2,290,283 | 13,303,855 | 2,378,633 |